Digital semiconductor devices such as logic devices, microprocessors, microcontrollers, digital signal processors or semiconductor memories operate on digitally encoded user data. The user data thereby consist of individual bits which may adopt two logical states. Typically, these two logical states are encoded by two different electrical potentials, e.g. one logical state may be represented by a voltage of 0 V and the other logical state by a voltage of 1.2 V. Of course, any other voltage values may be selected and are commonly used. Between both voltage levels and with sufficient distance thereto, a threshold value is defined at which a voltage deviating from the desired value is assigned to either the one or to the other logical state.
Semiconductor devices of the aforementioned type frequently comprise a plurality of parallel data lines by means of which a plurality of bits may be processed in parallel. The number of lines guided in parallel thereby frequently corresponds to the logical grouping of individual bits. For example, 8 bits may be combined to result in one byte. In this case the semiconductor devices frequently comprise 8, 16 or 32 parallel data lines in order to accordingly be able to process 1, 2 or 4 bytes in parallel.
Typically, more than one bit or more than one byte is sequentially processed by the semiconductor device. In this case the individual symbols, each representing a bit, must have a predefined distance or length in time from each other in order to be recognized as different bits by the semiconductor device.
In order to guarantee the observance of a correct time interval between individual symbols of a data signal, a clock signal is typically provided synchronizing a plurality of semiconductor devices or a plurality of circuits on a single semiconductor device. Thereby, however, inaccuracies occur which may lead to errors when operating the semiconductor device. For example, the data signals may advance or lag with regard to the clock signal. Furthermore, the user is free to provide for clock signals with differing frequencies for different applications of the semiconductor device, so that more or less time is available to the semiconductor device for processing a symbol. The limitations in which reliable operation is guaranteed by the manufacturer of the semiconductor device are usually communicated to the user by the manufacturer of the semiconductor device. First of all, however, the mentioned minimum requirements for the data signals provided for processing have to be detected during the development and manufacturing of the semiconductor devices. Thereafter, a test of the semiconductor devices is carried out in order to verify that the requirements are fulfilled. For this purpose, a data signal with an adjustable symbol duration is required, i.e. a square wave signal having an adjustable duty cycle. For test purposes, such a data signal may be specifically adjusted in such a way that the semiconductor device to be tested is operated at its specification limits. In this way it can be guaranteed that the semiconductor device fulfills these specifications.
Thus, the object underlying the present invention is to provide a method and a device for generating a digital data signal the symbol duration of which is variable and may be adjusted by means of a control signal.